RHBD RISC-V CPU Core

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RHBD RISC-V CPU Core

RHBD RISC-V CPU Core

Radiation-hardened 32-bit RISC-V soft processor with TMR, ECC-protected caches, SEU/SEL/SEFI mitigation. Portable RTL for ASIC or rad-tolerant FPGA flows.

Description

A 32-bit RISC-V soft processor architected from the ground up for radiation-tolerant operation in space and high-altitude defense environments.
RHBD techniques include Triple Modular Redundancy (TMR) on critical registers and pipeline stages, ECC-protected caches and register files, periodic scrubbing of configuration and state memory, and SEU/SEL/SEFI mitigation in control logic. The core targets RV32IMC with optional FPU, supports common embedded toolchains (GCC, LLVM), and is deliverable as portable RTL for foundry ASIC or rad-tolerant FPGA flows.

Target applications: Satellite OBCs, payload controllers, launcher avionics, deep-space instrument controllers, strategic defense systems requiring TID / SEE tolerance.

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